CVE-2017-18347

CVSS V2 Medium 4.9 CVSS V3 Medium 4.6
Description
Incorrect access control in RDP Level 1 on STMicroelectronics STM32F0 series devices allows physically present attackers to extract the device's protected firmware via a special sequence of Serial Wire Debug (SWD) commands because there is a race condition between full initialization of the SWD interface and the setup of flash protection.
Overview
  • CVE ID
  • CVE-2017-18347
  • Assigner
  • cve@mitre.org
  • Vulnerability Status
  • Analyzed
  • Published Version
  • 2018-09-12T15:29:00
  • Last Modified Date
  • 2021-05-04T14:07:13
Weakness Enumerations
CWE URL
CWE-362 http://cwe.mitre.org/data/definitions/362.html
CPE Configuration (Product)
CPE Vulnerable Operator Version Start Version End
AND
cpe:2.3:o:st:stm32f071rb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f071rb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f071v8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f071v8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f071vb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f071vb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f072c8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f072c8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f072cb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f072cb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f072r8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f072r8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f072rb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f072rb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f072v8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f072v8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f072vb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f072vb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f078cb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f078cb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f078rb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f078rb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f078vb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f078vb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f091cb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f091cb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f091cc_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f091cc:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f091rb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f091rb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f091rc_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f091rc:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f091vb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f091vb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f091vc_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f091vc:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f098cc_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f098cc:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f098rc_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f098rc:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f098vc_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f098vc:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f070c6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f070c6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f070cb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f070cb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f070f6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f070f6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f070rb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f070rb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f071c8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f071c8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f071cb_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f071cb:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051t8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051t8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f058c8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f058c8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f058r8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f058r8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f058t8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f058t8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f070c6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f070c6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051k4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051k4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051k6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051k6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051k8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051k8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051r4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051r4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051r6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051r6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051r8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051r8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f042t6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f042t6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f048c6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f048c6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f048g6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f048g6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f048t6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f048t6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051c4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051c4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051c6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051c6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f051c8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f051c8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f042f4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f042f4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f042f6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f042f6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f042g4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f042g4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f042g6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f042g6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f042k4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f042k4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f042k6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f042k6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f038c6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f038c6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f038e6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f038e6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f038f6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f038f6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f038g6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f038g6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f038k6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f038k6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f042c4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f042c4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f042c6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f042c6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f031e6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f031e6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f031f4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f031f4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f031f6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f031f6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f031g4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f031g4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f031g6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f031g6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f031k4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f031k4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f030f4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f030f4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f030k6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f030k6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f030r8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f030r8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f030rc_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f030rc:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f031c4_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f031c4:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f031c6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f031c6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f030c6_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f030c6:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f030c8_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f030c8:-:*:*:*:*:*:*:* 0 OR
AND
cpe:2.3:o:st:stm32f030cc_firmware:-:*:*:*:*:*:*:* 1 OR
cpe:2.3:h:st:stm32f030cc:-:*:*:*:*:*:*:* 0 OR
CVSS Version 2
  • Version
  • 2.0
  • Vector String
  • AV:L/AC:L/Au:N/C:C/I:N/A:N
  • Access Vector
  • LOCAL
  • Access Compatibility
  • LOW
  • Authentication
  • NONE
  • Confidentiality Impact
  • COMPLETE
  • Integrity Impact
  • NONE
  • Availability Impact
  • NONE
  • Base Score
  • 4.9
  • Severity
  • MEDIUM
  • Exploitability Score
  • 3.9
  • Impact Score
  • 6.9
CVSS Version 3
  • Version
  • 3.1
  • Vector String
  • CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:N/A:N
  • Attack Vector
  • PHYSICAL
  • Attack Compatibility
  • LOW
  • Privileges Required
  • NONE
  • User Interaction
  • NONE
  • Scope
  • UNCHANGED
  • Confidentiality Impact
  • HIGH
  • Availability Impact
  • NONE
  • Base Score
  • 4.6
  • Base Severity
  • MEDIUM
  • Exploitability Score
  • 0.9
  • Impact Score
  • 3.6
References
Reference URL Reference Tags
https://www.usenix.org/conference/woot17/workshop-program/presentation/obermaier Exploit Third Party Advisory
https://www.aisec.fraunhofer.de/en/FirmwareProtection.html Exploit Third Party Advisory
https://community.st.com/s/question/0D50X00009Xke7aSAB/readout-protection-cracked-on-stm32 Vendor Advisory
Sources
Source Name Source URL
NIST https://nvd.nist.gov/vuln/detail/CVE-2017-18347
MITRE https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-18347
History
Created Old Value New Value Data Type Notes
2022-05-10 16:17:41 Added to TrackCVE
2022-12-03 12:02:02 2018-09-12T15:29Z 2018-09-12T15:29:00 CVE Published Date updated
2022-12-03 12:02:02 2021-05-04T14:07:13 CVE Modified Date updated
2022-12-03 12:02:02 Analyzed Vulnerability Status updated