CVE-2013-2076
CVSS V2 Medium 4.3
CVSS V3 None
Description
Xen 4.0.x, 4.1.x, and 4.2.x, when running on AMD64 processors, only save/restore the FOP, FIP, and FDP x87 registers in FXSAVE/FXRSTOR when an exception is pending, which allows one domain to determine portions of the state of floating point instructions of other domains, which can be leveraged to obtain sensitive information such as cryptographic keys, a similar vulnerability to CVE-2006-1056. NOTE: this is the documented behavior of AMD64 processors, but it is inconsistent with Intel processors in a security-relevant fashion that was not addressed by the kernels.
Overview
- CVE ID
- CVE-2013-2076
- Assigner
- secalert@redhat.com
- Vulnerability Status
- Modified
- Published Version
- 2013-08-28T21:55:08
- Last Modified Date
- 2023-02-13T00:28:23
Weakness Enumerations
CPE Configuration (Product)
CPE | Vulnerable | Operator | Version Start | Version End |
---|---|---|---|---|
cpe:2.3:o:xen:xen:4.0.0:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.0.1:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.0.2:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.0.3:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.0.4:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.2.0:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.2.1:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.2.2:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.1.0:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.1.1:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.1.2:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.1.3:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.1.4:*:*:*:*:*:*:* | 1 | OR | ||
cpe:2.3:o:xen:xen:4.1.5:*:*:*:*:*:*:* | 1 | OR |
CVSS Version 2
- Version
- 2.0
- Vector String
- AV:A/AC:H/Au:S/C:C/I:N/A:N
- Access Vector
- ADJACENT_NETWORK
- Access Compatibility
- HIGH
- Authentication
- SINGLE
- Confidentiality Impact
- COMPLETE
- Integrity Impact
- NONE
- Availability Impact
- NONE
- Base Score
- 4.3
- Severity
- MEDIUM
- Exploitability Score
- 2.5
- Impact Score
- 6.9
References
Sources
Source Name | Source URL |
---|---|
NIST | https://nvd.nist.gov/vuln/detail/CVE-2013-2076 |
MITRE | https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2013-2076 |
History
Created | Old Value | New Value | Data Type | Notes |
---|---|---|---|---|
2022-05-10 10:25:35 | Added to TrackCVE | |||
2022-12-01 19:29:59 | 2013-08-28T21:55Z | 2013-08-28T21:55:08 | CVE Published Date | updated |
2022-12-01 19:29:59 | 2014-12-12T02:59:28 | CVE Modified Date | updated | |
2022-12-01 19:29:59 | Modified | Vulnerability Status | updated | |
2023-02-13 01:04:21 | 2023-02-13T00:28:23 | CVE Modified Date | updated | |
2023-02-13 01:04:22 | Xen 4.0.x, 4.1.x, and 4.2.x, when running on AMD64 processors, only save/restore the FOP, FIP, and FDP x87 registers in FXSAVE/FXRSTOR when an exception is pending, which allows one domain to determine portions of the state of floating point instructions of other domains, which can be leveraged to obtain sensitive information such as cryptographic keys, a similar vulnerability to CVE-2006-1056. NOTE: this is the documented behavior of AMD64 processors, but it is inconsistent with Intel processors in a security-relevant fashion that was not addressed by the kernels. | Xen 4.0.x, 4.1.x, and 4.2.x, when running on AMD64 processors, only save/restore the FOP, FIP, and FDP x87 registers in FXSAVE/FXRSTOR when an exception is pending, which allows one domain to determine portions of the state of floating point instructions of other domains, which can be leveraged to obtain sensitive information such as cryptographic keys, a similar vulnerability to CVE-2006-1056. NOTE: this is the documented behavior of AMD64 processors, but it is inconsistent with Intel processors in a security-relevant fashion that was not addressed by the kernels. | Description | updated |